View STP60NF10_5713217.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1/9 november 2004 STP60NF10 n-channel 100v - 0.019 - 80a to-220 stripfet? ii power mosfet package

typical r ds (on) = 0.019 extremely highl dv/dt capability 100% avalanche tested description this mosfet series realized with stmicroelec- tronics unique stripfet? process has specifical- ly been designed to minimize input capacitance and gate charge. it is therefore suitable as primary switch in advanced high-efficiency, high-frequency isolated dc-dc converters for telecom and com- puter applications. it is also intended for any appli- cations with low gate drive requirements. applications high efficiency dc/dc converters, industrial, and lighting equipment. motor control type v dss r ds(on) i d STP60NF10 100 v < 0.023 80 a 1 2 3 to-220

ordering information
absolute maximum ratings ( pulse width limited by safe operating area. (**) current limited by package (1) i sd 80a, di/dt 300a/s, v dd v (br)dss , t j t jmax (2) starting t j = 25 o c, i d = 40a, v dd = 30v sales type marking package packaging STP60NF10 p60nf10 to-220 tube symbol parameter value unit v ds drain-source voltage (v gs = 0) 100 v v dgr drain-gate voltage (r gs = 20 k ) 100 v v gs gate- source voltage 20 v i d (*) drain current (continuous) at t c = 25c 80 a i d drain current (continuous) at t c = 100c 66 a i dm ( drain current (pulsed) 320 a p tot total dissipation at t c = 25c 300 w derating factor 2 w/c dv/dt (1) peak diode recovery voltage slope 16 v/ns e as (2) single pulse avalanche energy 485 mj t stg storage temperature -55 to 175 c 1
STP60NF10 2/9 thermal data electrical characteristics (t case = 25 c unless otherwise specified) off on (*)
dynamic rthj-case rthj-amb t l thermal resistance junction-case thermal resistance junction-ambient maximum lead temperature for soldering purpose max max 0.5 62.5 300 c/w c/w c symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 100 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating t c = 125c 1 10 a a i gss gate-body leakage current (v ds = 0) v gs = 20 v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs i d = 250 a 234v r ds(on) static drain-source on resistance v gs = 10 v i d = 40 a 0.019 0.023 symbol parameter test conditions min. typ. max. unit g fs (*) forward transconductance v ds = 25 v i d =40 a 78 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v f = 1 mhz v gs = 0 4270 470 140 pf pf pf
3/9 STP60NF10 switching on switching off source drain diode (*) pulsed: pulse duration = 300 s, duty cycle 1.5 %. ( pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd = 50 v i d = 40 a r g =4.7 v gs = 10 v (resistive load, figure ) 17 56 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 50v i d = 80a v gs = 10v 104 20 32 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd = 50 v i d = 40 a r g =4.7 v gs = 10 v (resistive load, figure 3) 82 23 ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm ( ) source-drain current source-drain current (pulsed) 80 320 a a v sd (*) forward on voltage i sd = 80 a v gs = 0 1.3 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 80 a di/dt = 100a/s v dd = 50 v t j = 150c (see test circuit, figure 5) 92 340 7.4 ns c a electrical characteristics (continued) thermal impedance safe operating area
STP60NF10 4/9
output characteristics transfer characteristics transconductance static drain-source on resistance gate charge vs gate-source voltage capacitance variations
5/9 STP60NF10 . . normalized gate threshold voltage vs temperature normalized on resistance vs temperature source-drain diode forward characteristics normalized breakdown voltage vs temperature. . .
STP60NF10 6/9
unclamped inductive load test circuit switching times test circuits for resis- tive load unclamped inductive waveform gate charge test circuit test circuit for inductive load switch- ing and diode recovery times
7/9 STP60NF10

!
! "

# #$
#
# # #
#

STP60NF10 8/9 revision history date revision description of changes wednesday 24 november 2004 1.0 first issue
9/9 STP60NF10 i nformation furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the con sequence s o f use of such information nor for any infringement of patents or other rights of third parties which may result from its use. n o license is grante d b y implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicatio n are subje ct t o change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics produ cts are n ot a uthorized for use as critical components in life support devices or systems without express written approval of stmicroelectron ics. the st logo is registered trademark of stmicroelectronics all other names are the property of their respective owners. 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco -singapore - spain - sweden - switzerland - united kingdom - united states of america. www.st.com

▲Up To Search▲

Price & Availability of STP60NF10

	To Download STP60NF10 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .